1. Field of the Invention
A full phase shifting mask for patterning a metal layer in an integrated circuit is described. In particular, the full phase shifting mask can be used with a damascene process, thereby allowing hard-to-etch materials, such as copper, to be used for the metal layer.
2. Description of the Related Art
A standard binary mask includes a patterned opaque (e.g. chrome) layer formed on a transparent (e.g. quartz) substrate. The pattern can be transferred onto the wafer using optical lithography. Specifically, for each layer of the circuit design, a radiation (e.g. light) source is shone on the mask (wherein the term mask can also refer herein to a reticle) corresponding to that layer. This radiation passes through the transparent regions of the mask and is blocked by the opaque regions of the mask, thereby selectively exposing a photoresist layer on the wafer.
The areas in the photoresist layer exposed to the radiation, i.e. irradiated areas, are either soluble or insoluble in a specific solvent, called a developer. If the irradiated areas are soluble, then the photoresist is called a positive photoresist. In contrast, if the irradiated areas are insoluble, then the photoresist is called a negative photoresist. After development of the photoresist layer, the underlying semiconductor layer no longer covered by photoresist can be removed by an anisotropic etch, thereby transferring the desired pattern onto the wafer. This process can be repeated for each layer of the integrated circuit design on the wafer.
A conventional process for patterning a metal layer comprises depositing that metal layer on the wafer and then depositing a positive photoresist layer on the metal layer. The positive photoresist can then be exposed using a clear field binary mask (wherein the opaque pattern on the mask represents features in the layout). At this point, etching can be performed to generate the desired pattern in the metal layer.
This process works well for metal patterns having critical dimensions greater than 0.13 microns. However, to enhance device performance at smaller critical dimensions, the semiconductor industry is moving from aluminum to copper. Unfortunately, copper is very difficult to etch. Therefore, a conventional metal process as described above cannot be used for a copper layer.
However, a damascene process can be used to form a copper pattern. The damascene process can include forming an oxide layer on the wafer and then depositing a negative photoresist layer on the oxide layer. The negative photoresist can be exposed using the clear field binary mask. After exposure, the exposed portions of the oxide layer can be easily etched to form the desired pattern. At this point, copper can be deposited and planarized (e.g. using a CMP operation), thereby forming the desired pattern in copper.
However, positive photoresists are currently the dominant resists for many applications as they provide better resolution than negative photoresists. Therefore, a need arises for a technique of patterning a metal layer, particularly a hard-to-etch metal, using a positive photoresist.